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Tag: instruction set architecture

Andes Technology: Pioneering the Future of RISC-V CPU IP – Semiwiki

On September 13, 2021, Andes Technology Corporation successfully issued its GDR (Global Depositary Receipt) public offering on the Luxembourg Stock Exchange. At the time...

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Arm invests in Raspberry Pi to cement influence over IoT developers

About the Author By Ryan Daws | 3rd November 2023 Categories: IoT, ...

S2C’s FPGA Prototyping Accelerates the Iteration of XiangShan RISC-V Processor – Semiwiki

S2C announced that the Beijing Institute of Open Source Chip (BOSC) adopted its Prodigy S7-19P Logic System, a VU19P-based FPGA prototyping solution, in the...

A Safety Island For Safe Use of HPC Devices For Safety-Critical Systems with RISC-V

A technical paper titled “Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains” was published by researchers at Barcelona Supercomputing Center and...

Democratizing Zero-Knowledge Computing: The Power of RISC Zero’s Bonsai Network – Blockchain Capital

By Bart Stephens, Ryan Sproule, and Yuan Han Li Imagine a world where data privacy, security, and trust are no longer concerns, where software supply...

Mirabilis Invites System Architects at DAC 2023 in San Francisco – Semiwiki

System architects have a difficult task of choosing the most efficient architecture by exploring alternative approaches, while tracking and testing requirements. Using a Model-Based...

Programming Processors In Heterogeneous Architectures

Programming processors is becoming more complicated as more and different types of processing elements are included in the same architecture. While systems architects may revel...

History of the SPARC CPU Architecture

nicely presents the curious history of the SPARC processor architecture. SPARC, short for Scalable Processor Architecture, defined some of the most commercially successful...

Baidu Invests in RISC-V Chip Startup StarFive

On March 23, Shanghai-based RISC-V chip technology startup StarFive announced that it had received an investment from Chinese search giant Baidu of an undisclosed...

Tiempo Secure announces TESIC RISC-V Secure Element IP and development…

Tiempo Secure Mikael Dubreucq, Tiempo Secure VP Global Sales and Marketing, says: "By introducing the Tiempo Secure TESIC RISC-V Secure Element...

Fujitsu provides supercomputer system to the Japan Meteorological Agency for forecasting of linear rainbands and torrential rains

TOKYO, Feb 27, 2023 - (JCN Newswire) - Fujitsu today announced that it provided a new supercomputer system to the Japan Meteorological Agency (hereinafter...

CEO Interview: Axel Kloth of Abacus

A physicist by training, Axel is used to the need for large-scale compute. He discovered over 30 years ago that scalability of processor performance...

A Developer’s Guide to the zkGalaxy

Introduction This is an extremely useful heuristic to differentiate approaches for supporting a zkEVM. However, zkEVMs are a subset of all the possible...

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