By Liz Allan, Jesse Allen, and Karen Heyman
Global semiconductor equipment billings dipped 2% year-over-year to US$25.8 billion in Q2, and slipped 4% compared with...
A new technical paper titled “FMEDA based Fault Injection to Validate Safety Architecture of SPI” was published by researchers at R.V. College of Engineering...
A new technical paper titled “A Thermal Machine Learning Solver For Chip Simulation” was published by researchers at Ansys.
Abstract“Thermal analysis provides deeper insights into...
A new technical paper titled “Universal control of a six-qubit quantum processor in silicon” was just published by researchers at Delft University of Technology,...
A new technical paper titled “RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures” was published by researchers at Politecnico di Torino (Italy), Univerity of Tor...
A new research paper titled “Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits” was published by researchers at University of Bremen and...
This technical paper titled “Hardware-in-the-Loop Simulations: A Historical Overview of Engineering Challenges” was published by researchers at University of Maribor, Slovenia.
Abstract:“The design of modern...
This new technical paper titled “Machine-Learning-Based Compact Modeling for Sub-3-nm-Node Emerging Transistors” was published by researchers at SungKyunKwan University, Korea.
Abstract:“In this paper, we present...
This new research paper titled “An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators” was published by researchers at Georgia Tech.
According to...
A new technical paper titled “A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications” was published by researchers at University of Southern California (USC).
According to the...
This technical paper titled “DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks” is co-authored from researchers at The University...
This technical paper titled “Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration” was published jointly by researchers at UC Berkeley and a co-author...
This new technical paper titled “RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs” was published by researchers at...
