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Battling Over Shrinking Physical Margin In Chips

Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design...

Holistic Power Reduction

The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power...

How eSIM standards are evolving for secure IoT

Sitting behind cellular communications infrastructure is a vast library of complex technology common, industry-specific engineering standards and specifications. Stakeholder organisations invest extensive effort and...

Power Delivery Network Analysis in DRAM Design

My IC design career started out with DRAM design back in 1978, so I’ve kept an eye on the developments in this area of...

Taming Corner Explosion In Complex Chips

There is a tenuous balance between the number of corners a design team must consider, the cost of analysis, and the margins they insert...

Build a Circuit Sculpture-Style VU Meter For Music

One of the coolest things any sound system can have is some kind of musical visualization. Thumping level meters that pump with the volume...

Heart Aerospace selects Siemens Xcelerator for E/E system design, optimisation and certification of new electric aeroplane

Electric aeroplane maker Heart Aerospace has selected Capital software from the Siemens Xcelerator portfolio to support its E/E system design, development, and certification of...

Automated Late Stage Timing-Aware Dynamic Voltage Drop ECO

Systems & Design OPINION Why instant feedback between ECO and DVD analysis is so important. ...

Minimizing EM/IR Impacts On IC Design Reliability And Performance

By Joel Mercier and Karen Chow As technologies and foundry process nodes continue to advance, it gets more difficult to design and verify integrated circuits...

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