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UCIe InterOp Testchip Unleashes Growth of Open Chiplet Ecosystem – Semiwiki

Intel recently made headlines when CEO Pat Gelsinger unveiled the world’s first UCIe interoperability test chip demo at Innovation 2023. The test chip built...

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Chip Industry’s Earnings Roundup

Many companies reported revenue growth in the most recent quarter, but the latest round of chip industry earnings releases reflected some major themes: Demand for...

SiPs: The Best Things in Small Packages

System-in-package (SiP) is quickly emerging as the package option of choice for a growing number of applications and markets, setting off a frenzy of...

Improving Redistribution Layers for Fan-out Packages And SiPs

Redistribution layers (RDLs) are used throughout advanced packaging schemes today including fan-out packages, fan-out chip on substrate approaches, fan-out package-on-package, silicon photonics, and 2.5D/3D...

Variation Making Trouble In Advanced Packages

Variation is becoming increasingly problematic as chip designs become more heterogeneous and targeted by application, making it difficult to identify the root cause of...

Keeping IC Packages Cool

Placing multiple chips into a package side-by-side can alleviate thermal issues, but as companies dive further into die stacking and denser packaging to boost...

Chiplets Enter The Supercomputer Race

Nations compete on speed using very different compute architectures.

The post Chiplets Enter The Supercomputer Race appeared first on Semiconductor Engineering.

Thin Quad Die Package (QDP) Development

A new packaging format provides extreme silicon area density versus package volume.

The post Thin Quad Die Package (QDP) Development appeared first on Semiconductor Engineering.

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