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Demystifying BDF Table programming for Slave Bridge Address Translations for AXI address

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Starting in QDMA v4.0, address translations for an AXI address are done based on BDF table programming.

These BDF table entries can be programmed through the AXI4-Lite Slave CSR interface, s_axil_csr_*. There are 8 windows provided, similar to the 8 BARs on a PCIe bus. Each entry in the BDF table programming represents one window.

This blog elaborates on the BDF table programming examples provided in (PG302) (v4.0). 

Example 1: BAR Size of 64 KB, with 1 Window

Window 0: BAR size is 4 KB with address translation of 0xF for bits [15:12]. AXI address bus width = 64 bits.

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AXI BAR Size : 64K = (64*1024) – 1 = 65535 = 0xFFFF = 16’b1111_1111_1111_1111 = [15:0] bits
To address 64K of AXI BAR size, [15:0] bits are required in the AXI address bus. Address translation for [63:16] bits are set in the GUI. In this example, [63:16] = 0x76AA.
Base Address : 0x0000_0000_76AA_0000
High Address : 0x0000_0000_76AA_{AXI BAR size} = 0x0000_0000_76AA_FFFF

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There can be a maximum of 8 Windows. So, the maximum size for a window can be computed as follows:

Window Size = AXI BAR size / 8 = 64K / 8 = 8K = (8*1024) -1 = 8191 = 13’b1_1111_1111_1111 = [12:0] bits

But for this example, only a BAR size of 4K is required. Therefore, for window size of 4K, 4K/4K = 0x1 is programmed at 0x2430 bits [25:0].

BAR size of 4K = (4*1024)-1 = 4095 = 12’b1111_1111_1111 = [11:0] bits

Address translation for [15:12] bits is programmed at 0x2420 and 0x2424. In this example, address translation for bits [15:12] are set to 0xF. If bits [15:12] are set to 0xF and rest of the LSBs are set to 0 (zero), it will result in 16’b1111_0000_0000_0000 which in hexadecimal is 0x0000_F000.

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For this example, an AXI address of 0x0000_0000_76AA_0101 will be address translated to 0x0000_0000_76AA_F101.

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Example 2: BAR Size of 64 KB, with 1 Window

Window 0: BAR size is 8 KB with address translation value of ‘b110 for bits [15:13]. AXI address bus width = 64 bits

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AXI BAR Size : 64K = (64*1024) – 1 = 65535 = 0xFFFF = 16’b1111_1111_1111_1111 = [15:0] bits

To address 64K of AXI BAR Size, [15:0] bits are required in the AXI address bus. Address translation for [63:16] bits is set in the GUI. In this example, [63:16] = 0x76AA.

Base Address : 0x0000_0000_76AA_0000

High Address : 0x0000_0000_76AA_{AXI BAR size} = 0x0000_0000_76AA_FFFF

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There can be a maximum of 8 Windows. So, the maximum size for a window can be computed as follows:

Window Size = AXI BAR Size / 8 = 64K / 8 = 8K = (8*1024) -1 = 8191 = 13’b1_1111_1111_1111 = [12:0] bits

For this example, a BAR size of 8K is required. Therefore, for a window size of 8K, 8K/4K = 0x2 is programmed at 0x2430 bits [25:0].

BAR Size of 8K = (8*1024)-1 = 8191 = 13’b1_1111_1111_1111 = [12:0] bits

Address translation for [15:13] bits are programmed at 0x2420 and 0x2424. In this example, address translation for bits [15:13] is set to 110. If bits [15:13] are set to 110 and rest of the LSBs are set to 0 (zero), it will result in 16’b1100_0000_0000_0000 which in hexadecimal is 0x0000_C000.

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For this example, AXI address 0x0000_0000_76AA_0011 will be address translated to 0x0000_0000_76AA_C011.

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Example 3: BAR Size of 32 GB, and 4 Windows of Various Sizes

Window 0: BAR size is 4 KB with address translation of 0xAAAAA for bits [34:12].

Window 1: BAR size is 4 GB with no address translation on window.

Window 2: BAR size is 64 KB with address translation of 0xBBBB for bits [34:16].

Window 3: BAR size is 1 GB with address translation of 11111 for bits [34:30].

AXI BAR size : 32GB = (32*1024*1024*1024) – 1 = 34359738367 = 0x7_FFFF_FFFF = 35’b111_1111_1111_1111_1111_1111_1111_1111_1111 = [34:0] bits

To address 32GB of AXI BAR Size, [34:0] bits are required in the AXI address bus. Address translation for [63:35] bits are set in the GUI. In this example, [63:35] = 0xAED.

Base Address : 0x0000_AED0_0000_0000

High Address : 0x0000_AED{AXI BAR size} = 0x0000_AED7_FFFF_FFFF

9.png

There can be a maximum of 8 Windows. The maximum size for a window can be computed as:

Window Size = AXI BAR size / 8 = 32GB / 8 = 4GB  = (4*1024*1024*1024) -1 = 4294967295 = 13’b1111_1111_1111_1111_1111_1111_1111_1111 = [31:0] bits

This example uses 4 Windows. Each Window should have a different BDF table entree start address and is calculated as follows:

BDF table entree start address = 0x2420 + (0x20 * i), where i = table entree number

For Window 0:

AXI address bus width = 64 bits

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For Window-0, a BAR size of 4K is required. Therefore, for a window size of 4K, 4K/4K = 0x1 is programmed at 0x2430 bits [25:0].

BAR Size of 4K = (4*1024)-1 = 4095 = 12’b1111_1111_1111 = [11:0] bits

Address translation for [34:12] bits are programmed at 0x2420 and 0x2424. Address translation for bits [31:12] are set to 0xAAAA_A and bits [34:32] are set to ‘b111.

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If the address from AXI is 0x0000_AED0_0000_0F11, it falls within the address range of Window 0 and also within the 4KB address range. Therefore, it will be translated to 0x0000_AED7_AAAA_AF11.

For Window 1:

AXI address bus width = 64 bits

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For Window 1, a BAR size of 4GB is required. Therefore, for a window size of 4GB, (4*1024*1024)K/4K = 0x10_0000 is programmed at 0x2450 bits [25:0]. The BDF table entree start address for Window 1= 0x2420 + (0x20 * 1) = 0x2440.

BAR Size of 4GB = (4*1024*1024*1024)-1 = 4294967295 = 32’hFFFF_FFFF = [31:0] bits

Address translation for [34:32] bits are programmed at 0x2440 and 0x2444. Address translation at 0x2440 is not required because a BAR size of 4GB covers all ranges of Window 1. Address translation for bits [34:32] are set to 0x5 at 0x2444.

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If the slave address from AXI is 0x0000_AED1_00EA_0F11, it falls within the address range of Window 1. The BAR size of Window 1 is 4GB and therefore covers the entire range of Window 1. The AXI address will therefore be translated to 0x0000_AED5_00EA_0F11.

For Window 2:

AXI address bus width = 64 bits

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For Window 2, a BAR size of 64KB is required. Therefore, for a window size of 64KB, 64K/4K = 0x10 is programmed at 0x2470 bits [25:0].

The BDF table entree start address for Window 2 = 0x2420 + (0x20 * 2) = 0x2460.

BAR Size of 64KB  = (64*1024)-1 = 65535= 16’hFFFF = [15:0] bits

Address translation for [34:16] bits are programmed at 0x2460 and 0x2464. Address translation for bits [31:16] are set to 0xBBBB and bits [34:32] are set to ‘b111.

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If the address from AXI is 0x0000_AED2_0000_051A, it falls within the address range of Window 2 and also within the 64KB BAR size for Window 2. Therefore, the AXI address will be translated to 0x0000_AED7_BBBB_051A.

For Window 3:

AXI address bus width = 64 bits

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For Window 3, a BAR size of 1GB is required.

Therefore, for a window size of 1GB, (1*1024*1024)K/4K = 0x4_0000 is programmed at 0x2490 bits [25:0].

The BDF table entree start address for Window 3 = 0x2420 + (0x20 * 3) = 0x2480.

BAR Size of 1GB  = (1*1024*1024*1024)-1 = 1073741823= 30’h3FFF_FFFF = [29:0] bits

Address translation for bits [31:30] is programmed at 0x2480 and address translation for bits [34:32] is programmed at 0x2484. Address translation for bits [31:30] is set to ‘b11 and address translation for bits [34:32] is set to ‘b111 which means that 0xC000_0000 is programmed at 0x2480 and 0x0000_0007 is programmed at 0x2480.

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If the slave address from AXI is 0x0000_AED3_3F2C_0DAC, it falls within the address range of Window 3 and also within the 1GB BAR size for Window 3. Therefore, the slave address will be translated as follows:

 AED3_3F2C_0DAC  = AED3_<b0011>_F2C_0DAC

Here the ‘3’ in green is address translated to ‘7’ because we have the following programmed:

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Out of the 4 binary bits in ‘3’ in red, the two LSBs (i.e. 11 here) are part of the destination address and hence should not be address translated. Only the two MSBs (i.e. 00 here) are address translated according to the following programmed value:

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This gives the following as the final address translated address.

AED7_<’b1111>_F2C_0DAC = AED7_FF2C_0DAC

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Source: https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Demystifying-BDF-Table-programming-for-Slave-Bridge-Address/ba-p/1260264

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