The interdependence of semiconductor devices and companies in manufacturing was a recurring theme at this year’s SEMICON West, both in presentations and one-on-one discussions. Challenges range from sharing data securely across a highly integrated supply chain, particularly in light of heterogeneous integration, security concerns, and the increased use of AI, as well as concerns about the robustness of the supply chain.
All of this becomes increasingly challenging as the IC industry shifts from cramming everything onto a single SoC to advanced packaging with chiplets.
“If you think about traditional advanced packaging, you had a single flip chip, you could have a single bond layer. You’d reflow that chip, and if there were any issues with the connection, you could pop that out and disassemble it,” said Brad Perkins, product line director at Nordson Test & Inspection. “When you get into heterogeneous packaging, and multiple stacks of them, the ability to disassemble, reflow, and do that in a cost-competitive way becomes a problem. Also, you may have a non-conductive film that isn’t workable in a high-bandwidth memory stack. It just gets more complex because you have multiple layers and more things that can’t be reworked.”
Chiplets and heterogeneous integration also require a strategy for sharing data, particularly as chiplets shift from internally developed to a commercial, off-the-shelf model. “It requires adding another layer on top of the data for access controls, very similar to managing export controls for IP,” said Simon Rance, vice president of marketing at Cliosoft. “And it needs to be completely programmable, so customers can program that exactly to their requirements. They can isolate or geofence a piece of the data or a piece of the design and control who can have access to it, who can see it or even know about it.”
For the chip industry to make progress on any major effort, such as smart manufacturing, cybersecurity, or sustainability, it requires collaboration up and down the supply/value chain. And that collaboration comes in many forms, from defining standards, partnering in the development of new technologies, to joining regional groups with common business objectives.
For instance, to address the carbon emissions from power utilities requires a consortium to negotiate a cost-effective rate. “We will be aggregating the demand and the consumption of the suppliers depending on where they are geographically,” said Dallai Slimani, vice president of the semiconductor segment at Schneider Electric. “Many of the suppliers are so small they don’t have access to some energy markets. This aggregation will actually provide the whole cohort access to those markets.”
Alan Weber of Cimetrix, a PDF Solutions company, presented results of SEMI member survey of their usage of the EDA standard. Defined Circa 2001 it supports a higher density of equipment data (volume and rate) as well as the flexibity to change data collection needs. Users stressed the importance of EDA in supporting real-time dispatch capabilities and other benefits to streaming data real-time. Speaking of real-time dispatch, Minds.ai and D-Simlab Technologies both presented on AI methods in to improve real-time scheduling in wafer fabs.
Test Vision Symposium panel discussion, “From Assembly Line to Field: The Future Semiconductor Testing. (L-R) Intel; proteanTecs; PDF Solutions; and rchon Design Solutions. Source: Semiconductor Engineering
Ann Mutschler moderated a panel at DAC on the key challenges remaining for chip design in the cloud. Left to right: Ann Mutschler (Semiconductor Engineering), Phil Steinke (AMD), Craig Johnson (Siemens EDA), Mahesh Turaga (Cadence), Rob Aitken (Synopsys), Richard Ho (Lightmatter). (Source: Semiconductor Engineering)
Ed Sperling moderated a panel at DAC discussing design considerations and tradeoffs for 2.5D chiplet solutions. Left to right: Ed Sperling (Semiconductor Engineering), Mark Kuemerle (Marvell), Craig Bishop (Deca Technologies), Tony Mastroianni (Siemens EDA), Saif Alam (Movellus). (Source: Semiconductor Engineering)
More from DAC/Semicon West 2023
Megatrends At DAC
AI/ML, RISC-V, chiplets, and engineering talent top the list of topics at the 60th DAC.
Chip Industry Needs More Trust, Not Zero Trust
Chipmakers call for unity over rising cybersecurity threat.
DAC/Semicon West Wednesday
U.S.-China relations, chip outlook, circling back to EDA’s early days.
DAC/Semicon West Addresses Top Issues, Trends For Chips
The chip industry returns in full force after a four-year gap.
More photos from the show floor at Semicon West 2023
Above: Youngdo Global is a grower manufacturer in South Korea that plans to produce monocrystalline silicon ingots and process them to meet the customer’s need in the US. If the company can get funding, it says it will bring the technology and an equipment to the US for qualification. Source: Semiconductor Engineering / Susan Rambo
Nikon camera attached to an infrared camera on a microscope makes it possible to see through silicon layers, at the Nikon booth, Semicon West 2023. Source: Semiconductor Engineering/ Susan Rambo
Cadence’s William Chen speaking in the Samsung Semiconductor’s booth at DAC 2023 in San Francisco on July 11. Source: Semiconductor Engineering / Susan Rambo
NSW Automation showed off microbumps produced by NSW’s precision equipment at Semicon West 2023. Source: Semiconductor Engineering / Susan Rambo
New York State’s booth at SEMICON West 2023, in San Francisco, Calif. July 12. Source: Semiconductor Engineering / Susan Rambo
SMC’s air management system at SEMICON West 2023, in San Francisco, Calif. July 12. Source: Semiconductor Engineering / Susan Rambo
ONTO Innovation booth on last day of Semicon West 2023, in Moscone Center, San Francisco. Source: Semiconductor Engineering / Susan Rambo
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- Source: https://semiengineering.com/dac-semicon-west-2023-roundup/
