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Blog Review: June 29

Date:

Sensor digital twins; digitally-assisted analog design; optical I/O; edge framework.

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Synopsys’ Emilie Viasnoff argues that optical sensors are critical building blocks of autonomous vehicles and that sensor digital twins have the potential to dramatically reduce the amount of field testing needed by using driving simulators for tasks ranging from design and testing to integration and autonomous driving system co-optimization.

Siemens’ Sumit Vishwakarma considers the evolution toward digitally-assisted analog and mixed-signal design to keep up the pace of performance improvements.

Cadence’s Paul McLellan listens in on a talk by James Jaussi of Intel Labs on the transition from electrical to optical I/O, when it makes sense to do so, and how it optical I/O would be deployed in a data center server.

Arm’s Tina Tsou introduces LF Edge, an effort to establish an open, interoperable framework for edge computing independent of hardware, silicon, cloud, or operating system, as well as some of the projects in all stages of development the organization is supporting.

Ansys’ Marc Swinnen looks at how design changes intended to fix IR drop end up damaging timing, which leads to more edits and unintended consequences, and why overdesign is no longer a viable option for getting around potential problems.

SEMI’s Ming-Chang Wu discusses the SEMI E187 specification for cybersecurity of fab equipment and how it aims to define fab equipment procurement cybersecurity requirements and address issues of security depreciation when legacy software reaches end-of-life.

And don’t miss the blogs featured in the recent Systems & Design newsletter:

Technology Editor Brian Bailey finds that when the problem statement changes, it sometimes pays to use a completely different approach.

University of California, Los Angeles’ Jason Cong considers how to make IC design more accessible to more people.

Movellus’ Aakash Jani shows how to avoid downtime during large-scale power state changes by allowing clock generators to switch between frequencies in response to voltage changes.

Cadence’s Frank Schirrmeister observes that the shift from a domain-oriented architecture to vehicle-centralized and zonal architectures is paying returns.

Renesas’ Kaushal Vora explains how to retrieve higher value from collected data by reacting to it immediately.

Siemens’ Karen Chow and Salma Ahmed Elhenedy lay out why the high frequencies and data rates involved in 5G designs make layout verification all the more important.

Codasip’s Jamie Broome argues that differentiation is key in the rapidly evolving automotive sector.

Keysight’s Ben Miller looks at tackling signal integrity challenges associated with higher bit rate.

Synopsys’ Mark Richards shares the recipe for ensuring all the design data needed for debug and optimization is captured and available.

Jesse Allen

Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

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